In general, a solid state imaging device includes a plurality of pixel portions each including a plurality of pixels arranged in a matrix. Each pixel includes a photoreceptor portion configured to output an electric signal according to an amount of incident light and a transfer portion configured to sequentially transfer stored charges. The photoreceptor and the transfer portion are provided on a principal surface of a semiconductor substrate.
A structure of a transfer portion of a typical known solid state imaging device and a method for forming the transfer portion will be described with reference to FIGS. 15(a) through 15(e).
First, as shown in FIG. 15(a), a silicon oxide film 12 and a silicon nitride film 13 are formed over a semiconductor substrate 11 so as to be stacked in this order and then a polysilicon layer 14A is formed over the semiconductor substrate 11.
Next, as shown in FIG. 15(b), the polysilicon layer 14A is patterned using lithography and etching, thereby forming a first gate electrode 14. In this patterning, a certain amount of reduction in film thickness occurs due to etching in part of the silicon nitride film 13 other than part thereof located under the first gate electrode 14.
Next, as shown in FIG. 15(c), polysilicon forming the first gate electrode 14 is thermally oxidized, thereby forming a silicon oxide film 15 on upper part and side walls of the first gate electrode 14. Because of a difference between an oxide film growth rate on the silicon nitride film 13 and an oxide film growth rate on the polysilicon film forming the first gate electrode 14, a surface of the silicon nitride film 13 is hardly oxidized.
Next, as shown in FIG. 15(d), a polysilicon layer 16A is formed over the semiconductor substrate 11.
Next, as shown in FIG. 15(e), the polysilicon layer 16A is patterned using lithography and etching, thereby forming a second gate electrode 16 partially overlapping with the first gate electrode 14.
The above-described known solid state imaging device has the following problems. FIGS. 16(a) and 16(b) are cross-sectional views for explaining the problems of the structure of the transfer portion of the known solid state imaging device.
First, the second gate electrode 16 is electrically separated from the first gate electrode by the silicon oxide film 15 and overlaps with the first gate electrode 14. As described above, the silicon oxide film 15 is formed utilizing a difference in oxide film growth rate between the silicon nitride film 13 and the polysilicon film forming the first gate electrode 14. Thus, as shown in FIG. 16(a), a thickness of the silicon oxide film 15 interposed between the first gate electrode 14 and the second gate electrode 16 is smaller in part thereof located on lower parts of the side walls of the first gate electrode 14 than in other part thereof. Accordingly, an inter-gate leakage current is easily generated in the part of the silicon oxide film 15 located on the lower parts of the side walls of the first gate electrode 14.
Second, due to etching performed in forming the first gate electrode 14, a film thickness is reduced by a certain amount in part of the silicon nitride film 13 other than the part thereof located under the first gate electrode 14. Accordingly, the part of the silicon nitride film 13 located under the first gate electrode 14 and part of the silicon nitride film 13 located under the second gate electrode 16 have different thicknesses. As a result, a dielectric capacitance between the first gate electrode 14 and the semiconductor substrate 11 and a dielectric capacitance between the second gate electrode 16 and the semiconductor substrate 11 differ from each other. Therefore, as shown in FIG. 16(b), a potential under each gate electrode varies, and degradation of characteristics such as reduction in a saturated charge amount for charges to be stored and reduction in transfer efficiency are caused. In FIG. 16(b), VL and VM denote voltage levels applied to the gate electrodes, respectively.
To cope with the above-described problems, as described in Patent Reference 1, a technique characterized in that after removal of a silicon nitride film, a silicon nitride film is newly formed has been proposed.
Hereafter, a solid state imaging device described in Patent Reference 1 and a method for fabricating the solid state imaging device will be described with reference to FIGS. 17(a) through 17(g).
First, as shown in FIG. 17(a), a silicon oxide film 22 and a silicon nitride film 23 are formed over a semiconductor substrate 21 so as to be stacked in this order and then a polysilicon layer 24A is formed over the semiconductor substrate 21.
Next, as shown in FIG. 17(b), the polysilicon layer 24A is patterned using lithography and etching, thereby forming a first gate electrode 24. In this patterning, a certain amount of reduction in film thickness occurs due to etching in part of the silicon nitride film 23 other than part thereof located under the first gate electrode 24.
Next, as shown in FIG. 17(c), polysilicon forming the first gate electrode 24 is thermally oxidized, thereby forming a silicon oxide film 25 on upper part and side walls of the first gate electrode 24. Because of a difference between an oxide film growth rate on the silicon nitride film 23 and an oxide film growth rate on the polysilicon film forming the first gate electrode 24, a surface of the silicon nitride film 23 is hardly oxidized.
Next, as shown in FIG. 17(d), the part of the silicon nitride film 23 other than the part thereof located under the first gate electrode 24 is removed by wet etching using phosphoric acid which is highly selective with respect to the silicon oxide film 25.
Next, as shown in FIG. 17(e), a silicon nitride film 26 is formed over the semiconductor substrate 21 so as to have the same thickness as a thickness of the part of the silicon nitride film 23 located under the first gate electrode 24.
Next, as shown in FIG. 17(f), a polysilicon layer 27A is formed over the semiconductor substrate 21.
Next, as shown in FIG. 17(g), the polysilicon layer 27A is patterned using lithography and etching, thereby forming a second gate electrode 27 partially overlapping with the first gate electrode 24.
In the above-described solid state imaging device of Patent Reference 1, an interlevel film for electrically separating the first gate electrode 24 and the second gate electrode 27 from each other is formed of the silicon oxide film 25 and the silicon nitride film 26. Thus, an inter-gate leakage current is hardly generated, so that a breakdown voltage between gate electrodes is improved. Moreover, part of the silicon nitride film 23 located under the first gate electrode 24 has the same thickness as a thickness of part of the second nitride film 26 located under the second gate electrode 27. Therefore, a potential difference under the gate electrodes can be prevented, so that excellent transfer efficiency can be achieved.
[Patent Reference 1]                Japanese Laid-Open Publication No. 6-85234        
[Patent Reference 2]                Japanese Laid-Open Publication No. 4-335572        
[Patent Reference 3]                Japanese Laid-Open Publication No. 5-267355        
[Patent Reference 4]                Japanese Laid-Open Publication No. 2003-229440        